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IREM Physical Design Engineer

Job in Markham, Ontario, I3P, Canada
Listing for: AMD
Full Time position
Listed on 2026-06-20
Job specializations:
  • Manufacturing / Production
    Test Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 CAD Yearly CAD 80000.00 100000.00 YEAR
Job Description & How to Apply Below

The Role

Join a world‑class team driving power integrity solutions for AMD’s next‑generation SoCs and advanced packaging technologies. In this role, you’ll define and optimize power delivery networks, perform IR‑drop and EM analysis using industry‑leading tools, and shape design methodologies for cutting‑edge CPU/GPU products. You’ll partner closely with physical design, packaging, and CAD teams, gaining exposure to advanced 3

DIC integration and high‑performance compute challenges. This is an opportunity to influence architecture‑level decisions and work in a collaborative, innovation‑driven environment.

The Person

The ideal candidate is detail‑oriented, proactive, and thrives in a fast‑paced, cross‑functional environment. Strong communication, problem‑solving, and a drive for continuous improvement are key. You are someone who enjoys debugging complex issues, collaborating with global teams, and developing automation to streamline workflows.

Key Responsibilities
  • Perform static/dynamic IR‑drop and EM analysis and drive closure across large‑scale SoCs.
  • Define and optimize power grid architecture, including decap strategy and current distribution planning.
  • Partner with physical design and packaging teams to align IR/EM signoff methodology with timing, floorplan, and system‑level requirements.
  • Develop and validate power integrity models; ensure correlation across PD, STA, and EMIR tools.
  • Debug IR/EM issues, improve analysis methodology, and enable automation (Python/Tcl).
  • Provide clear risk assessments and implement ECOs to mitigate power integrity challenges.
Preferred Experience
  • Experience with IR‑drop and EM analysis using tools such as Red Hawk or Voltus.
  • Knowledge of power delivery network design at chip and system levels (including advanced packaging/3

    DIC).
  • Familiarity with PnR flows, timing closure, and UPF/CPF power intent.
  • Scripting experience in Python or Tcl for automation and debug.
  • Strong understanding of signoff correlation across multiple analysis domains.
Academic Credentials
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field preferred.
Benefits

AMD benefits at a glance.

Equal Opportunity Employer

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

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