Foundry Technology Engineer

The application window is expected to close on: 10/08/2026

We are seeking an accomplished Engineer to join Cisco’s Component Quality and Technology team (CQT), driving the development and integration of next-generation Silicon Photonics (SiPh) and Electronic Integrated Circuits (EICs). In this role, you will serve as the technical interface between Cisco engineering and high-volume manufacturing (HVM) foundries, owning end-to-end process integration and qualification. You will translate design intent into manufacturable, reliable, and testable solutions that power the future of global networking.

• Foundry Engagement: Manage the end-to-end PIC and EIC tape-out lifecycle — from PDK engagement through DRC sign-off, process integration, and process qualification. Drive bring-up of electronic-photonic integration technology platforms in partnership with internal design and external foundry teams.

• Process Engineering: Develop, modify, and optimize photonic and electronic process flows across SiPh and CMOS platforms by leveraging CMOS fabrication capabilities. Conceptualize and execute critical process modules with a strong emphasis on design-for-manufacturing (DFM) principles, ensuring robust process windows and high yield from initial integration through HVM ramp.

• Advanced Electronic Photonic Integration :
  Lead and optimize wafer-scale processes for advanced EIC-PIC integration using Wafer-to-Wafer and Die-to-Wafer methods, focusing on co-design and co-fabrication strategies.

• Quality & Yield Optimization: Execute root-cause analysis and Design of Experiments (DOE) to address failure mechanisms in discrete and integrated components. Apply design-for-reliability (DFR) frameworks to anticipate and eliminate failure modes early in the development cycle, and drive process qualification.

• PhD or MS in Electrical Engineering, Optics, Photonics, or a related field.

• 4+ years of validated experience in chip development, foundry engagement, and process qualification, with demonstrated success in high-volume production environments. Direct experience working with external foundries (e.g., TSMC, Global Foundries, Tower, or comparable SiPh foundries) on process bring-up is highly desired.

• Knowledge in the design-for-manufacturing (DFM), design-for-reliability (DFR), and design-for-test (DFT) principles applied to the fabrication, integration, and characterization of PIC and EIC devices, across the full device lifecycle from early-stage design review through sustained HVM.

• Proficient in IC design tools including Cadence Virtuoso, Synopsys, and Klayout.

• Hands-on experience with hybrid bonding and thin-wafer processing

• Familiarity or hands-on experience with near-package optics (NPO) or co-packaged optics (CPO) architectures is a plus.

• Proven ability to work in cross-functional technical teams and lead vendor/foundry relationships

• Demonstrated ability to contribute to and lead projects within matrixed, geographically distributed technical teams.

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a…