Memory Subsystem Architect & P&R Engineer
Listed on 2026-10-13
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Engineering
Systems Engineer, Electronics Engineer, Electrical Engineering, Hardware Engineer
Broadcom is seeking a design engineer to join our Central Engineering Group, focusing on memory subsystems and large memory blocks. The role requires deep RTL experience and leadership to drive design closure across timing and physical constraints.
The candidate will architect memory subsystems, implement RTL, perform place and route, and support timing, DRC, LVS, EM/IR checks. A bachelor’s in electrical engineering and 8+ years of relevant work are expected.
The Memory Subsystem Architect & P&R Engineer role at Broadcom is now open for applications in Mendota Heights, MN, United States.
This opportunity is part of our work in Engineering.
The advertised compensation is 110..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Memory Subsystem Architect & P&R Engineer role in the description above.
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