Senior Silicon Packaging & SI/PI Engineer
Listed on 2026-11-04
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Engineering
Packaging Engineer, Test Engineer, Systems Engineer, Electronics Engineer
Meta seeks an experienced Signal Integrity and Power Integrity (SI/PI) Engineer to own chip-package-system co-design for AI accelerators and HPC silicon. You will drive SI/PI requirements from architecture through post-silicon validation across 2.5D/3D packages with ASIC, package, PCB, and OSAT partners.
Responsibilities include leading DPCO, substrate/interposer decisions, and validation of high-speed interfaces (HBM, PCIe, Ser Des).
Our organisation is growing, and we are hiring a Senior Silicon Packaging & SI/PI Engineer in Menlo Park, CA, United States.
For the Senior Silicon Packaging & SI/PI Engineer position at Meta, we are reviewing applications now.
Step into the Senior Silicon Packaging & SI/PI Engineer role at Meta in Menlo Park, CA, United States and grow with us.
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