Test And Validation Mgr Ii Engineering

Job Title:

TEST AND VALIDATION MGR II ENGINEERING

At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world.

Job Description:

Lead the Test & Validation engineering team responsible for characterization, design validation, qualification, interoperability, and production readiness of next-generation high-speed active copper cable products, Active Electrical Cables (AEC) and Active Copper Cables (ACC). This role combines people leadership, laboratory/test strategy, automation, and hands-on technical leadership for retimer/redriver-based products operating at 112G, 224G, and future signaling rates.

• Lead, mentor, and develop Test & Validation engineers and technicians; establish priorities, technical ownership, performance expectations, and development plans.
• Own validation strategy and DVT execution, translating product, customer, IEEE, MSA, CMIS, and internal requirements into measurable test coverage, pass/fail criteria, and release evidence.
• Lead high-speed electrical validation including BER/PRBS testing, PAM4/6 link characterization, eye/jitter measurements, transmitter/receiver performance, margin testing, voltage/current/power measurements, thermal characterization, and voltage/temperature corner testing.
• Drive laboratory automation using Python and reusable test frameworks; integrate BERTs, oscilloscopes, VNAs, power supplies, environmental chambers, I2C/CDB interfaces, switching systems, and monitoring equipment.
• Establish automated data collection, analysis, reporting, and trend monitoring to improve repeatability, test coverage, execution time, and engineering decision-making.
• Lead complex system-level debugging involving hardware, retimers/redrivers, signal integrity, power integrity, firmware, CMIS, thermal behavior, cable assemblies, host systems, and customer platforms.
• Ensure failures are documented, reproduced, root-caused, corrected, and revalidated; drive disciplined issue closure rather than pass-by-retest behavior.
• Partner with Hardware, SI, PI, Firmware, Regression/Interoperability, Mechanical/Thermal, Manufacturing, Product Engineering, and customer-facing teams throughout product development.
• Support customer issue reproduction, technical reviews, qualification activities, and clear communication of validation status, technical risks, and unresolved issues.
• Maintain laboratory capability, equipment planning, test methodology, documentation, and engineering standards needed to support multiple concurrent development programs.

• Bachelor's degree in Electrical Engineering, Computer Engineering, or closely related engineering discipline.
• 10+ years, or 6+ years with a Masters Degree,of relevant engineering experience in high-speed digital hardware, validation, test engineering, or related product development, with demonstrated technical or people leadership.
• Strong understanding of high-speed Ser Des systems, PAM4 signaling, BER/PRBS testing, eye diagrams, jitter, signal integrity, and link-margin concepts.
• Hands-on experience with high-speed test equipment such as BERTs, high-bandwidth oscilloscopes, VNAs, and automated electrical measurement systems.
• Experience developing structured validation plans, engineering test procedures, requirements traceability, and objective release criteria.
• Strong troubleshooting and root-cause-analysis skills across hardware, firmware, and system-level interfaces.
• Experience with automated laboratory testing and scripting, preferably Python.
• Ability to interpret schematics, PCB designs, electrical specifications, test data, and engineering requirements.
• Strong cross-functional leadership, written communication, and ability to communicate complex technical issues to engineering teams and management.

• Master's degree in Electrical Engineering, Computer Engineering, or related discipline and/or previous engineering management experience.
• Experience developing or validating 112G/224G PAM4 products, OSFP/QSFP-DD modules, AEC/ACC, optical modules, high-speed NICs/switches, or retimer-based systems.
• Experience with high-speed Ser Des/retimer technologies and familiarity with CMIS, IEEE 802.3 Ethernet requirements, OSFP MSA requirements, and module-management interfaces.
• Experience with automated BERT systems, hardware-in-the-loop testing, CI/CD regression, interoperability testing,…