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Digital Verification Engineer

Job in 20122, Milan, Lombardia, Italy
Listing for: NXP Semiconductors
Full Time position
Listed on 2026-08-29
Job specializations:
  • Engineering
    Test Engineer, Electronics Engineer
Job Description & How to Apply Below
Digital Verification Engineer

Location:

Milan, Italy – NXP Semiconductors We are looking for a motivated Digital Verification Engineer to join our R&D team in Milan. The successful candidate will contribute to the verification of complex mixed-signal ICs targeting automotive and industrial applications. Working closely with design, system, architecture and validation teams, the engineer will be responsible for planning, developing and executing verification activities to ensure high-quality silicon delivery.

This position is ideal for candidates with solid verification experience who are ready to take ownership of verification tasks and contribute to the development of advanced automotive semiconductor products.

Key Responsibilities Develop and execute verification plans for digital IPs, subsystems and SoC-level designs.

Create and maintain UVM/System Verilog-based verification environments.

Develop reusable verification components, sequences, scoreboards and coverage models.

Perform functional verification using simulation and regression environments.

Analyze simulation results, identify root causes of failures and drive issue resolution with design teams.

Define and monitor functional and code coverage metrics.

Contribute to verification methodology improvements and automation initiatives.

Support mixed-signal verification activities in collaboration with analog and AMS teams.

Participate in design reviews and technical discussions throughout the development cycle.

Contribute to the achievement of project quality, schedule and automotive requirements.

Required Skills Master's Degree in Electronic Engineering, Computer Engineering or related field.
3 to 5 years of experience in digital verification of ASIC or SoC designs.

Solid knowledge of System Verilog and UVM methodology.

Experience with constrained-random verification techniques.

Familiarity with functional coverage, assertions and regression management.

Good understanding of digital design fundamentals and RTL concepts.

Experience with industry-standard EDA verification tools.

Good debugging and problem-solving skills.

Fluent English, both written and spoken.

Preferred Qualifications Experience in automotive semiconductor development.

Knowledge of low-power verification methodologies.

Understanding of mixed-signal IC development flows.

Familiarity with scripting languages such as Python, Perl or Tcl.

Experience with formal verification techniques.

Knowledge of communication protocols commonly used in automotive applications (SPI, I2C, CAN, UART).#LI-DNISummary

Location:

Milan Type:
Full time
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