Front-End ASIC Design Engineer

Description

We are seeking a Front-End SoC/ASIC Design Engineer for our SoC business unit.

Responsibilities

• Support customer’s design through all phases of ASIC execution at Socionext.

• Ensure designs meet product Performance-Power-Area-Schedule requirements. Tasks may include Architecture / micro-Architecture;
Logic Design; RTL integration and coding;
Lint/CDC/DFT checks;
Synthesis & supporting timing‑closure;
Contribute to and support Verification;
Supporting Firmware and FPGA teams;
Silicon bring‑up.

• Ensure deadlines for project milestones are met while maintaining quality.

• Work effectively with internal and external (including customer and vendors) teams (

Note:

Socionext has teams located globally).

• Display a results‑focused attitude and accomplish Company/Team‑goals.

Qualifications

• Bachelor’s Degree in EE or similar degree.

• 5+ years of professional design experience, provided the work experience is solid micro‑architecture and front‑end design.

• Hands‑on ASIC front‑end design, ideally in design services environments (product backgrounds acceptable).

• Skills Required – Micro‑architecture at module/sub‑system/chip‑level; digital design of complex modules/sub‑systems, with solid understanding of clock‑domain crossings; integration of IPs/modules/sub‑systems designed by internal/external teams; experience using AMBA bus protocols;
System Verilog experience;
Lint and CDC execution and analysis; writing timing constraints and timing analysis; excellent debug skills; customer support.

• Technical document writing skill

• Teamwork, dedication, collaborative, strong communications, and interpersonal skills.

• Ability to meet stringent deadlines and project timelines.

• Skills Strongly Desired – SoC Architecture experience. Experience and domain‑knowledge in at least 2‑3 of these: CPU (preferably, ARM and/or RISC‑V), or GPU, or DSP;
SoC Memory hierarchy;
NoC/Fabric; low‑power design and verification; high‑speed peripheral interfaces such as CSI, HDMI/DP, I3C, USB, PCIe;
Machine‑learning / AI; FPGA.

Compensation: $ - $ per year

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