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Logic Design Engineer: FPGA Speed Protocols

Job in Milpitas, Santa Clara County, California, 95035, USA
Listing for: Teledyne FLIR
Full Time position
Listed on 2026-10-13
Job specializations:
  • Engineering
    Electronics Engineer, Hardware Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 142000 - 189000 USD Yearly USD 142000.00 189000.00 YEAR
Job Description & How to Apply Below
Position: Staff Logic Design Engineer: FPGA & High-Speed Protocols

Teledyne LeCroy, a global leader in protocol analysis and test solutions, seeks a Staff Logic Design Engineer in Milpitas, CA. You will architect and implement high-performance digital logic for protocol capture, analysis, and emulation on FPGA-based systems.

You’ll work on cutting-edge PCIe, USB, Ethernet protocols with cross-functional teams to deliver industry-leading test and measurement solutions; strong Verilog/System Verilog, FPGA tool chains, and UVM experience are essential.

As a Staff Logic Design Engineer: FPGA & High-Speed Protocols, you will play an important part at Teledyne FLIR in Milpitas, CA, United States.

The following role is for a Staff Logic Design Engineer: FPGA & High-Speed Protocols with Teledyne FLIR.

Our organisation is growing, and we are hiring a Staff Logic Design Engineer: FPGA & High-Speed Protocols in Milpitas, CA, United States.

This role is for the Staff Logic Design Engineer: FPGA & High-Speed Protocols role at Teledyne FLIR.

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