Senior Firmware Engineer

Direct message the job poster from Scale Flux

Department: Engineering/Firmware Development

Job Description: We are seeking a highly skilled CXL (Compute Express Link) Firmware Engineer to join our team. This role will focus on the development, optimization, and debugging of firmware for next-generation CXL-enabled systems. The ideal candidate will have a strong background in low-level firmware development, PCIe, memory subsystems, and system software for high-performance computing environments.

• Design, develop, and maintain firmware solutions for CXL-based devices and memory systems.
• Implement and optimize firmware components supporting CXL protocol, including memory pooling, coherency, and device enumeration.
• Work closely with hardware, software, and system architecture teams to ensure seamless CXL integration.
• Debug and resolve firmware issues related to CXL, PCIe, and memory management using various debugging tools and techniques.
• Collaborate on performance tuning and power optimization for CXL-based systems.
• Stay updated on CXL specifications and contribute to industry discussions and standards where applicable.
• Develop unit tests, validation frameworks, and automated testing strategies to ensure firmware quality and reliability.
• Provide technical documentation and support to internal teams and external partners.

• Engineer with 5+ years of experience in Linux kernel and kernel module development
• Experienced in Linux support and development with knowledge in one or more of the following areas: memory management, cache and memory subsystems, schedulers, file systems, architecture-specific code (x86, ARM, RISC-V)
• Hands-on experience with high-speed protocols like PCIe/CXL is a plus
• Good system knowledge and debugging mechanisms in the Linux kernel (ftrace, kdump, ktraces, ebpf, …)
• Familiarity with embedded systems development at SoC / Bare Metal level.
• Good knowledge of industry standards, such as BMC, IPMI, PCI/PCIe/CXL, I2C, I3C, SPD, SMBUS, ACPI and etc.
• Good knowledge of OCP standards, MCTP, PLDM, SPDM, JEDC and etc.
• Well organized, with good written and oral communication skills.
• Self-learning skill to understand and develop good understanding of the system.

• Work on cutting-edge CXL technology shaping the future of memory and computing architectures.
• Collaborate with industry leaders and top engineers in high-performance computing and semiconductor design
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• Competitive compensation, benefits, and career growth opportunities.

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Mid-Senior level

Full-time

Engineering and Design

Computers and Electronics Manufacturing

Mountain View, CA $-$ 1 week ago