Senior Software Engineer-Chiplet Emulation Platform; Simulator

Tsavorite Scalable Intelligence is building a new foundation for AI computing. We design silicon, systems, and software that work as one, bringing together general-purpose processing, AI acceleration, and scalable memory in a single architecture. From edge devices to data centers, our goal is to make advanced AI more powerful, efficient, and accessible.

Our founding team has a track record of shipping the highest performance silicon and we have engineering teams in the US and India. We are looking for curious, driven people across disciplines who want to turn ambitious engineering into real products and help shape how the world computes.

We are looking for an engineer with experience to develop and extend the simulator, our internal QEMU-based multi-chiplet emulation platform, along with its SystemC/RTL co-simulation bridge that lets hardware blocks be co-simulated alongside emulated software. The role requires strong C/C++, deep QEMU/device-model experience, SystemC and RTL co-simulation know-how, and Linux/guest OS bring-up skills.

• Experience in systems software, EDA/verification tooling, or platform emulation development, with demonstrated ownership of a simulation, emulation, or co-simulation environment.
• Expert-level C/C++ skills; strong proficiency with Python for tooling.
• Hands-on experience with QEMU internals (device model development, machine definitions, TCG) or a comparable full-system emulator.
• Working knowledge of SystemC and RTL/hardware co-simulation techniques, including transactor design between software-visible interfaces and hardware models.

• Develop and maintain the simulator, extending QEMU device models to represent chiplet subsystems, the Multi Plexus fabric, and platform peripherals with the fidelity software bring-up teams need.
• Drive pre-silicon software enablement for the AI Cores and ARM Application Cores by extending the simulator's chiplet, fabric, and peripheral models, and by developing the co-simulation bridge that integrates RTL/SystemC hardware models into the emulation environment for higher-fidelity co-simulation, working closely with hardware, DV, firmware, and OS bring-up teams.
• Design and build the SystemC/RTL co-simulation bridge that connects RTL or SystemC hardware models into the simulator, enabling co-simulation of real hardware blocks alongside emulated software.
• Debug and resolve emulation fidelity issues (timing, device modeling gaps, boot failures) that arise when bringing up firmware, kernel, and application software on the simulator ahead of silicon availability.
• Partner with hardware and DV teams to keep the co-simulation bridge's RTL/SystemC interfaces aligned with evolving chiplet designs, and with firmware/OS teams to prioritize which subsystems need co-simulation fidelity versus pure emulation.
• Build tooling and workflows (call-tree/profiling, image generation, cloud-init/seed tooling) that make the simulator easier for other engineering teams to use for day-to-day software bring-up.
• Maintain regression and validation coverage for the simulator and its co-simulation bridge so emulation platform changes don't silently break dependent teams' workflows.
• Represent the emulation/co-simulation platform in cross-functional design reviews, flagging where hardware or firmware design choices affect emulation feasibility or fidelity.

• BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or a related field (MS preferred).
• 7 to 15 yrs of work experience.

Own. Innovate. Make an Impact. Join a talented team building next-generation compute solutions and working on cutting-edge technology. Take ownership, collaborate with great engineers, grow your skills, and make an impact in a culture that values innovation and teamwork.

• Competitive compensation aligned with industry benchmarks.
• Comprehensive health insurance covering employees and eligible dependents.
• Stock options & ownership opportunities.