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SerDes Optical System Architect

Job in Mississauga, Ontario, Canada
Listing for: Synopsys
Full Time position
Listed on 2026-06-19
Job specializations:
  • Engineering
    Systems Engineer, Test Engineer, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 CAD Yearly CAD 100000.00 125000.00 YEAR
Job Description & How to Apply Below
Position: SerDes Optical System Architect - 15478 )

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI‑powered products. We deliver industry‑leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are you have spent years where electrical meets optical, where theory meets silicon, and where a good model saves months of debug. You know that Ser Des at 128

Gbps or 200

Gbps is about margin, jitter, equalization, and decisions that either hold together or fall apart when the link goes live. Building MATLAB models that actually predicted lab results has taught you the difference between what should work and what does work, and you understand why that gap matters more than most people realize.

Talking CDR loop dynamics with analog designers feels natural. So does explaining link budgets to customers who need to understand why their system will or will not close. You do not need perfect specs to start.

You build the model or algorithm that moves the design forward, then refine it when reality provides feedback. When silicon measurements diverge from simulation, you are the one who figures out why, not by guessing but by systematically working through the physics and the implementation until the picture is clear.

At Synopsys, you will work on Ser Des IP powering PCIe Gen6+ and 200G+ Ethernet in optical systems that ship. The team is deep, the problems are hard, and what you architect matters.

What You'll Be Doing
  • Build and maintain Ser Des system models in MATLAB and Simulink for NRZ and PAM4 optical links, covering transmitter, receiver, channel, and equalization behavior
  • Run sign‑off simulations across PCIe 128

    Gbps+ and Ethernet 200

    Gbps+ protocols to verify performance against spec and identify margin risks before tapeout
  • Design calibration and adaptation algorithms that tune transceiver performance in real time, balancing convergence speed, stability, and power
  • Correlate simulation results with silicon measurements, iterate models to close gaps, and document what changed and why
  • Support customers on system‑level performance questions, optical integration challenges, and link budget analysis for their specific channel and module configurations
  • Work with analog designers on circuit implementation tradeoffs, digital teams on DSP and calibration logic, and hardware engineers on lab bringup and characterization
  • Review architecture proposals, protocol updates, and design specs to ensure system‑level feasibility and flag issues early
The Impact You Will Have
  • Your models define what gets built, catching margin issues, equalization limits, and timing problems before silicon respins cost months and budget
  • You shape Ser Des IP performance for hyperscale data centers, AI training clusters, and next‑generation networking infrastructure where every dB and every picosecond matters
  • Your calibration and adaptation algorithms enable real‑time tuning that improves yield, reduces test time, and expands the operating envelope across process and temperature
  • You close the simulation‑to‑silicon gap, reducing customer debug cycles and giving them confidence that the IP will work in their system the first time
  • Your customer engagements surface real‑world constraints and edge cases that inform next‑generation architecture decisions and roadmap priorities
  • You help Synopsys maintain technical leadership in high‑speed optical Ser Des, a market where performance and credibility are won one successful tapeout at a time
  • You mentor engineers across analog, digital, and system domains, raising the bar on how modeling, correlation, and system thinking get done across the IP group
What You'll Need
  • M.Sc. or Ph.D. in Electrical Engineering, Computer Engineering, or a related field with focus on high‑speed communications, analog circuits, or signal processing
  • Deep expertise in one or more of the following: optical specifications like RTLR and LINEAR, Ser Des modeling in MATLAB or Simulink for IMDD optical links,…
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