Analog Design, Sr Staff Engineer

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

An experienced analog circuit designer with deep expertise in high-speed Multi-Gbps NRZ and PAM4 Ser Des IP, including advanced process nodes such as FinFET and Gate-all-around(GAA). You excel at translating Ser Des standards into robust, high-performance circuit architectures and are skilled in transistor-level design, system budgeting, and analog/digital co-design.

You are proactive, analytical, and collaborative, with a strong ability to identify architectural bottlenecks and drive innovative solutions that improve silicon quality and reliability. As a technical leader and mentor, you value design excellence, knowledge sharing, and team growth. You are committed to continuous learning, diversity, inclusion, and delivering impactful results in a fast-moving, innovative environment.

• Review Ser Des standards and define transceiver architectures and analog sub-block specifications for high-speed NRZ and PAM4 IP.
• Develop advanced circuit solutions to improve power, area, speed, and silicon robustness.
• Collaborate with analog, digital, and layout teams to ensure efficient design, verification, and implementation.
• Guide physical layout to minimize parasitics, device stress, and process variation.
• Define and execute design and verification strategies using industry-standard simulation tools.
• Present technical results and design tradeoffs to internal teams, customers, and stakeholders.
• Document design features, test plans, and results clearly and accurately.
• Support electrical characterization, analyze customer silicon data, and contribute to post-silicon improvements.
• Assist the system team and develop automation to improve productivity and quality.

• Drive innovation in high-speed analog and mixed-signal design for next-generation connectivity, computing, networking, and AI.
• Influence Ser Des architecture and improve scalability, performance, and power efficiency across the IP portfolio.
• Strengthen product quality and reliability through rigorous design, verification, and documentation.
• Mentor team members and promote a culture of technical excellence and continuous learning.
• Help deliver integrated solutions that meet demanding customer requirements and support successful post-silicon results.

• M.A.Sc. with 8+ years or PhD with 6+ years of relevant analog/mixed-signal IC design experience.
• Strong background in circuit/system modeling, analog design, DSP, and communications theory.
• Proven experience with Multi-Gbps Ser Des architectures, including TX, RX, equalizers, samplers, drivers, serialize rs/deserializers, PLLs, DLLs, bandgaps, regulators, oscillators, ADCs, and DACs.
• Experience with analog/digital co-design, calibration, adaptation, and timing handoff.
• Familiarity with ESD design, custom high-speed digital logic, and reliability considerations such as EM, IR, aging, and self-heating.
• Proficiency in schematic entry, physical layout, SPICE simulation, and Verilog-A modeling.
• Strong understanding of jitter, noise, signal integrity, parasitics, crosstalk, and design-for-reliability principles.
• Excellent communication, documentation, problem-solving, and attention-to-detail skills.

• Collaborative, open-minded, and eager to learn from and support others.
• Analytical, detail-oriented, and committed to high-quality…