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Senior VLSI Design Engineer — SoC & Tape

Job in California, Moniteau County, Missouri, 65018, USA
Listing for: TSMC - Taiwan Semiconductor Manufacturing Company Limited
Full Time position
Listed on 2025-12-22
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 156853 - 165000 USD Yearly USD 156853.00 165000.00 YEAR
Job Description & How to Apply Below
Position: Senior VLSI Design Engineer — SoC & Tape-out
Location: California

A leading semiconductor manufacturing company is seeking a Senior Engineer to apply SoC principles in advanced chip design. This role requires a Master's degree in Electrical Engineering and six months of relevant experience. Responsibilities include chip physical design, providing solutions to complex issues, and enhancing workflows with programming languages. The salary ranges from $156,853 to $165,000 per year, and the location is in California with potential travel to various sites.
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Position Requirements
10+ Years work experience
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