Power Distribution Network; PDN Expert - DIC​/HPC;

We are looking for a PDN expert to accelerate development of advanced power distribution solutions for next-generation 2.5D and 3

DIC products. This role is strategically critical as customer demand for higher performance continues to rise and power density trends exceed 4 W/mm². The engineer will identify bottlenecks in current offerings, define next-generation design flows, and partner with R&D, packaging, and EDA vendors to deliver robust solutions that support TSMC’s HPC roadmap.

This position requires both hands-on technical expertise and cross-functional leadership to bring new design methodologies from concept to reference flow, enabling customer success.

• Review and analyze current PDN reference flows and test vehicles; identify weaknesses and propose design improvements.
• Develop and validate PDN topologies and voltage regulator integration strategies for advanced 3
  
  DIC/HPC products.
• Collaborate with R&D, advanced packaging, and decoupling capacitance teams to ensure new solutions are manufacturable and scalable.
• Work closely with EDA vendors (Cadence, Synopsys, Ansys) to enable and certify PDN design and analysis flows.
• Provide end-to-end ownership of PDN design flow development and reference methodologies for internal and external customers.
• Mentor junior engineers on PDN concepts and high-power design practices.

• Master’s/PhD in Electrical Engineering with at least 15 years of working experience with specialization in power distribution networks, voltage regulators, or electromagnetics.
• Proven experience designing PDNs for high-power systems (≥42 W/mm²).
• Familiarity with best PDN payout theory and practices, voltage regulator design, in-package integration, and decoupling capacitor technologies, and usage.
• Proficiency with EDA tools and interfacing languages (Tcl, Python):
  Cadence:
  Allegro, Virtuoso, Sigrity, Voltus;
  Ansys: HFSS, Red Hawk.
• Strong problem-solving ability with capacity to investigate bottlenecks and propose actionable solutions.
• Strong written and verbal communication skills; ability to work across technical and business teams.

• Research or patents in PDN layout, voltage regulators, inductor technologies, or decoupling capacitance improvements.
• Experience with EDA flow development or building analysis tools.
• Programming skills (C/C++, Python, TCL, SKILL, Perl) for automation and data exchange.
• Knowledge of distributed voltage regulator coordination techniques (aka ganging) for large PDN designs.

Primary location:
San Jose, CA or Hsin Chu, Taiwan.

Relocation support and visa sponsorship may be considered for exceptional candidates.

At TSMC, we are at the forefront of semiconductor innovation, enabling the most advanced technologies in the world. By joining our team, you will work on cutting-edge challenges in high-performance computing, 2.5D/3

DIC integration, and power distribution networks that directly shape the future of technology.

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity.