System--Chip Design Engineer

Principal ASIC / SoC Design Engineer (AI/ML)

Location: Santa Clara, CA 95051 (Hybrid or Onsite as required)

Contract: 12+ Months (Possible Extension)

Pay Rate: $100/HR - $108/HR on W2

Job Description: Seeking a highly experienced Principal ASIC / SoC Design Engineer to lead the architecture, design, verification, and productization of advanced ASIC and System-on-Chip solutions for AI/ML‑driven applications. This role requires deep technical expertise, strong leadership capabilities, and the ability to drive complex hardware designs from concept through silicon.

The ideal candidate will have extensive experience in C++ programming, System Verilog, ASIC/SoC development, and a working understanding of AI/ML hardware concepts, along with proven success collaborating across hardware, software, and product teams.

• Define, model, design, optimize, verify, validate, implement, and document ASIC IP blocks and SoCs for high‑performance, low‑power products
• Develop advanced architectures, circuit specifications, logic designs, and system‑level simulations based on product requirements
• Lead digital and/or analog ASIC design activities across the full development lifecycle
• Collaborate closely with software architecture, hardware architecture, product management, and program management teams
• Evaluate and optimize ASIC design flows including RTL development, synthesis, place & route, timing closure, power analysis, and verification
• Utilize industry‑standard EDA tools and workflows (e.g., RTL‑to‑GDSII flow, Virtuoso) to deliver complex IP blocks and SoC designs
• Write and maintain detailed technical documentation for ASIC, IP, and EDA workflows
• Review designs and documentation produced by other engineers and provide technical feedback
• Mentor and provide technical guidance to junior and mid‑level engineers
• Influence architectural and technical decisions impacting multiple projects and product lines

• Expert‑level experience in C++ programming
• Hands‑on experience with System Verilog
• Strong background in ASIC and SoC design
• Experience with RTL‑to‑GDSII development flows
• Familiarity with EDA tools (e.g., Virtuoso or equivalent)
• Working knowledge of AI/ML concepts, particularly as they relate to hardware acceleration
• Experience with software productization and hardware‑software integration
• Strong debugging, documentation, and developer support skills

• Bachelor’s degree in Engineering, Computer Science, or a related field with 6+ years of relevant ASIC/SoC experience
• Master’s degree with 5+ years of relevant experience
• PhD with 4+ years of relevant experience

Enterprise Solutions Inc. is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

Mid‑Senior level

Contract

IT Services, IT Consulting, Semiconductor Manufacturing