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Principal Analog Design Engineer

Job in Saint-Jean-sur-Richelieu, Montérégie, Province de Québec, Canada
Listing for: Monolithic Power Systems, Inc.
Full Time position
Listed on 2026-03-14
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering
Job Description & How to Apply Below
Position: Staff/Principal Analog Design Engineer
Location: Saint-Jean-sur-Richelieu

Staff/Principal Analog Design Engineer page is loaded

Staff/Principal Analog Design Engineer Apply locations Remote - Canada time type Full time posted on Posted 2 Days Ago job requisition  R-581

Monolithic Power Systems ,Inc.(MPS) isoneofthefastestgrowingcompaniesinthe

Semiconductor industry.

Weareworldwidetechnicalleadersin Integrated Power Semiconductors and Systems Powerdeliveryarchitectures .AtMPS,wecultivatecreativity,arepassionateaboutsustainability,andarecommittedtoprovidingleading-edgeproductsandinnovationtoourcustomers.

Ourportfoliooftechnologyhelpspowerourworld---comejoinourteamandseehow

YOUcanmakeadifference.

Job Description:

Job Summary:

We’re looking for a passionate Staff or Principal Analog Design Engineer who is interested in designing analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS /DMOS technologies. Products may include switching regulators, hot-swap eFuse, haft-bridge driver and power management ICs for fast growing markets such as networking, server, telecom, notebook/server core voltage, graphic card core regulator, point-of-load (PoL) and power modules.

Key Responsibilities:

  • Analog Design Lead and architects to design IP blocks.

  • Design analog circuits including but not limited to: LDO’s, Charge Pumps, Bandgaps, Amplifiers, Drivers, DAC’s, Current Sensing Techniques and other common precision circuits.

  • Actively participates in the entire product development cycle, from product definition to product introduction (Trade-offs among Risk Assessment, Cost Analysis and Performance Evaluation)

  • Design-For-Test strategic planning (Test Plan Development) to evaluateblocks’ performance

  • Conduct design reviews and manage tape out schedule

  • Provide guidance to layout engineers on critical analog implementation aspects, monitors progress of layouts, and closes the loop with post layout and simulation.

  • Work with cross functional team to evaluate intended product behavior during pre Tape-out and post Tape-out.

  • Design Blocks Verification (PVT, Monte Carlo Analysis), Top Level AMS Simulations and Post layout extraction and simulations

  • Supervise and train juniors for successful design execution

Qualifications and Requirements:

  • Requires PhD/MSEE or Equivalent in Electrical Engineering

  • 10+ years’ experience within analog design

  • Comprehensive simulation skills in Cadence Environment

  • Highly motivated individual and collaborative team player

  • Strong analytical/problem-solving skills and Hands on experiments

  • Solid background of BiCMOS & High Voltage BCD Process Technology, reliability, ESD Latch Up

  • Strong knowledge of transistor level design and low power design techniques

  • Solid understanding of control loop topologies (Constant On Time, Peak/Valley Current Mode, Voltage Mode control loops)

Location: Greater Vancouver Area, BC (Canada)

At Monolithic Power Systems, we are dedicated to nurturing the well-beingand financial stability of our employees through a comprehensive and competitive benefits program. Our benefits include extended health, dental,vision, life and disability insurance as well as a paid time off program. For more information on MPS’ benefits please view our company website at  .

Monolithic Power Systems, Inc. (MPS) is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of MPS to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.

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