Manager, Digital Design Engineering

Transform semiconductor technology at Synopsys as the Manager of Digital Design Engineering. Spearhead advanced SERDES projects and lead a team of innovative engineers in this collaborative role.

In this position, you will focus on digital design and verification for high-speed ASIC solutions. With over five years of experience in ASIC design, you will also support junior engineers and ensure rigorous adherence to coding and verification standards. Effective communication and project management will be key to your success in this dynamic role.

Key Responsibilities:

• Direct digital design for next-generation SERDES products

• Ensure specification accuracy in mixed-signal environments

• Develop and track detailed test plans and metrics

• Manage design flows for low-power and clock domain crossing

• Provide leadership during product lifecycle phases

Requirements:

• MSEE or similar degree with 5+ years in the field

• Expertise in Verilog or VHDL for ASIC projects

• Knowledge of asynchronous clock crossings and optimization

• Experience in collaborative debugging environments

• Strong foundation in digital and mixed-signal design

Elevate your career by leading transformative projects at Synopsys.
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