Ingénieur principal en analogique​/Principal Engineer - Analog Design

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Le groupe Timing and Communication (TCG) de Microchip recherche activement un ingénieur principal en conception analogique. Les responsabilités couvrent un large éventail d’activités telles que la conception, la simulation et la validation de circuits intégrés analogiques (CI). Les produits sont généralement des conceptions SoC à signaux mixtes. L’équipe analogique développe les blocs IP critiques utilisés dans les produits de synchronisation du TCG.

Ces circuits comprennent des PLL multi-GHz, des circuits numériques haute vitesse, des pilotes MEMS ainsi que des pads d’E/S à hautes performances et haute vitesse. En tant qu’ingénieur en conception analogique et membre de l’équipe Analog IP, vous serez amené à:

• Travailler avec les responsables de conception analogique et les architect es afin de concevoir des blocs IP analogiques spécifiques.
• Simuler des circuits analogiques dans différentes variantes de procédé et conditions de fonctionnement.
• Développer des modèles de blocs de conception destinés à être intégrés dans des simulations mixtes analogiques/numériques au niveau système.
• Effectuer la validation au niveau bloc des dispositifs issus du procédé silicium ainsi que l’évaluation en laboratoire au niveau système.

The Timing and Communication Group (TCG) at Microchip has an open vacancy for principal analog design engineer. The responsibility spans wide range of activities such as the design, simulation and validation of analog integrated circuits (ICs). The products are usually mixed signal SOC designs. The Analog team develops the critical IP blocks used in the TCG timing products. These circuits include multi-GHz PLL circuits, high speed digital circuits, MEMS drivers and high-speed performance IO pads.

As an Analog Design Engineer and a member of the Analog IP team, you will:

• Work with analog design leads and architects to design specific analog IP blocks.
• Simulate analog circuits across process corners and operating conditions.
• Develop models of design blocks for inclusion in top-level mixed-signal simulations.
• Perform block-level validation of silicon process devices and system-level laboratory evaluation.

Exigences du poste

• Maîtrise ou doctorat en génie électrique
• Minimum de 5 ans d’expérience directe dans le domaine des…