More jobs:
FPGA/Design Verification Engineer
Job in
Mountain View, Santa Clara County, California, 94039, USA
Listed on 2026-01-01
Listing for:
ADPMN Inc
Full Time
position Listed on 2026-01-01
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
FPGA/Design Verification Engineer
Location
Mountain View, CA (Onsite)
Duration
12+ Months
Job Description
• Strong understanding of FPGA design principles and architecture.
• Proficiency in System Verilog and UVM verification methodology.
• Experience with industry-standard verification tools (e.g., Questa Sim, Synopsys VCS).
• Knowledge of code coverage and functional coverage analysis.
• Excellent debugging and problem-solving skills.
• Strong communication and collaboration skills.
Requirements
• Bachelors or masters degree in electrical engineering, Computer Engineering, or a related field.
• Experience in FPGA verification.
• Experience with scripting languages (e.g., Python, Perl).
• Familiarity with hardware description languages (e.g., VHDL, Verilog).
Seniority level
Entry level
Employment type
Full-time
Job function
Engineering and Information Technology
Industries
IT Services and IT Consulting
#JLjbffr
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
Search for further Jobs Here:
×