Boeing, ASIC​/FPGA Design and Verification Engineers; Entry Level, Associate, or Experien

Boeing, ASIC and/or FPGA Design and Verification Engineer (Entry Level, Associate, or Experienced) - Application via Way Up

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Company:
The Boeing Company – Mountain View, CA.

We are seeking ASIC and FPGA Design and Verification Engineers at all experience levels to join the Boeing Electronic Products group. The role will develop state‑of‑the‑art digital ICs/SoCs for aircraft, satellite and space programs.

• Collaborate with customers, system engineers and hardware engineers to capture requirements and architect digital logic functions.
• Explore trade‑space of potential ASIC/FPGA technologies and determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance.
• Implement FPGA/ASIC with latest design practices and tools from block‑level micro‑architecture through HDL coding and physical design.
• Integrate DSP IP from Boeing’s algorithm team and third‑party IP as needed.
• Perform static timing analysis, LEC, CDC, linting and other checks to ensure the design completes on schedule.
• Develop functional coverage models and perform code coverage to verify designs in simulation.
• Create self‑checking and reusable test benches from scratch, applying object‑oriented programming concepts such as inheritance and polymorphism and leveraging UVM.
• Drive FPGA‑based prototyping and validation depending on program and system requirements.
• Validate design through hardware integration test with special test equipment, testbeds, and higher‑level systems.

• Bachelor of Science degree in Engineering (Electrical, Mechanical, Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry, or equivalent qualifications.
• Knowledge of ASIC/FPGA design or verification.

• Associate (Level
  2): 2+ years of related work experience.
• Experienced (Level
  3): 5+ years of related work experience.
• Master’s Degree in EE, Computer Engineering/Science, or equivalent.
• Experience with ASIC/FPGA architectural definition and detailed design implementation and functional verification using System Verilog.
• Experience with hardware emulators, especially Palladium.
• Proficiency with System Verilog and System Verilog Assertions.
• Experience with high‑speed Ser Des interfaces (JESD
  204C, PCIe, Ethernet).
• Proficient in scripting languages:
  Make, Perl, Python, etc.
• Revision control systems: svn, cvs, git.
• Proficient in Linux environments.
• Familiarity with space‑based design techniques and radiation mitigation.
• Demonstrated history of first‑pass success with ASIC designs.

Entry Level (Level
1):
Bachelor’s degree or equivalent technical education with no professional experience required.

Associate (Level
2):
Bachelor’s degree and 2+ years of related work experience.

Experienced (Level
3):
Bachelor’s degree and 5+ years of related work experience.

This position offers relocation based on candidate eligibility.

1st shift.

Competitive base pay, variable compensation and comprehensive benefits including health insurance, retirement plans and paid/unpaid time off. Salary ranges:
Entry Level $76,500 - $103,500;
Associate $94,350 - $127,650;
Experienced $114,750 - $155,250.

Requires ability to obtain a U.S. Security Clearance; U.S. citizenship required for a Secret clearance. Meets export control compliance as a U.S. Person. No visa sponsorship.

Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, disability, military status or other protected characteristics.