Principal Validation Engineer

Job d:

Location:

United States, California, Mountain View Salary: USD $142,800 - $274,800 per year

Employment type:

Full-Time Work site: 3 days / week in-office

Role type:
Individual Contributor Travel:
Less than 25%
Profession:
Hardware Engineering Discipline:
Silicon Engineering Company:
Microsoft Overview The  Artificial Intelligence Silicon Engineering team is seeking passionate, driven, and intellectually curious computer/electrical engineers to deliver premium-quality designs once considered impossible.   We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner. We are looking for a Principal Validation Engineer to join the Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team.

In this role, you will play a key role in silicon bring-up, Electrical and functional validation, and lab infrastructure development for next-generation AI silicon. You will work across silicon validation, board design, electrical engineering, FPGA prototyping, and system integration, enabling successful execution from first silicon through product readiness. The ideal candidate combines strong post-silicon validation experience with hands-on expertise in hardware platforms, electrical engineering, board-level debug, and lab operations.

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.  

In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day.

Responsibilities Silicon bring-up and validation of complex AI SoCs, FPGA prototypes, and hardware platforms.  Drive board-level debug and root-cause analysis across silicon, firmware, power delivery, clocks, resets, and high-speed interfaces.  Partner with PCB, Package, Power, Mechanical, Signal Integrity, Design, Verification, and Architecture teams to develop and validate hardware platforms.  Review schematics, PCB layouts, power architecture, and board designs to ensure robust validation and bring-up readiness.  

Define and execute electrical characterization plans including power, thermal, margining, and high-speed interface validation.  Develop validation strategies, test plans, firmware, and automation infrastructure for pre-silicon and post-silicon environments.  Architect, deploy, and maintain validation labs including rack infrastructure, FPGA platforms, automation frameworks, and lab instrumentation.  Utilize lab equipment including oscilloscopes, logic analyzers, protocol analyzers, waveform generators, power analyzers, and environmental systems to debug complex hardware and system issues.  

Drive system integration and debug across PCIe, Ethernet, DDR/HBM, JTAG, I2C, SPI, UART, and other platform interfaces.  Collaborate with cross-functional teams to influence next-generation silicon, board, and platform designs.  Improve validation efficiency through innovative debug methodologies, automation, and lab workflows.  Mentor engineers in hardware bring-up, lab debugging, electrical engineering fundamentals, and validation methodologies.

Qualifications Required/minimum qualifications

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+…