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LEO Satellite Modem FPGA​/ASIC Engineer Lead

Job in Mountain View, Santa Clara County, California, 94039, USA
Listing for: Logos Space
Full Time position
Listed on 2026-11-04
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Hardware Engineer, Telecoms Engineering
Salary/Wage Range or Industry Benchmark: 190000 - 280000 USD Yearly USD 190000.00 280000.00 YEAR
Job Description & How to Apply Below

Logos Space in Mountain View, CA seeks a Senior FPGA Modem Engineer to design, verify and release FPGA-based modem solutions for our high-throughput LEO satellite system. You will work with the modem systems team on waveform designs using fixed-point FPGA hardware and DSP blocks.

This role offers the chance to help build a space-grade communications system from the ground up, collaborating with HW, FW, RF and networking teams while mentoring junior engineers and applying best practices in FPGA

We have an opening for a LEO Satellite Modem FPGA/ASIC Engineer Lead in Mountain View, CA, United States within Engineering.

We aim to respond to suitable candidates as soon as possible.

Full responsibilities and requirements are described in the listing above.

Learn more about the LEO Satellite Modem FPGA/ASIC Engineer Lead role in the description above.

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