RTL Design Engineer: NoC & Networking AI Accelerators
Listed on 2026-10-09
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Engineering
Hardware Engineer, Test Engineer, Systems Engineer
OpenAI’s Hardware organization seeks a highly experienced RTL engineer with deep packet-networking and interconnect expertise to own critical on‑chip communication components for our AI accelerator platform.
You will drive the microarchitecture, RTL implementation, and verification closure, coordinating silicon bring‑up and production readiness while mentoring junior engineers and coordinating with external partners.
This Full Time opening is for the RTL Design Engineer:
NoC & Networking for AI Accelerators role at OpenAI.
If your experience matches this role, we encourage you to apply.
All applications are reviewed carefully by our team.
This is a Full Time role.
The position is based in United States.
This opportunity is part of our work in IT & Technology, Engineering.
The advertised compensation is 180..
We aim to respond to suitable candidates as soon as possible.
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