Principal Analog Layout Engineer
Job in
Neath, Neath Port Talbot, SA11, Wales, UK
Listed on 2026-05-31
Listing for:
Chipright
Full Time
position Listed on 2026-05-31
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
Principal Analog Layout Engineer
- Minimum 5 years experience but ideally >8+ years Experience- experience in 65nm and below(ideally 22nm and below)- understanding of layout for critical timing (PLL, DLL, clock distribution)- understanding of matching techniques for timing circuits and current cells- chip finishing experience a bonus- experience of Cadence PVS/QRC/Pegasus
Senior Analog & AMS Recruitment Specialist
#J-18808-LjbffrPosition Requirements
5+ Years
work experience
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