Senior SI/PI Packaging Lead .5D ASICs
Listed on 2026-10-18
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Engineering
Packaging Engineer, Electronics Engineer
Location: New York
Cisco Silicon One seeks a senior Signal and Power Integrity Technical Lead for remote-friendly US-based candidates. This role focuses on developing ASIC packaging, SI/PI analyses across interposer, substrate, and PCB, and leading high-speed designs in a global silicon architecture.
You will drive post-layout extraction, collaborate with vendors and design leads, mentor teammates, and shape processes for complex ASIC/package developments in a fast-paced environment.
We invite applications for the Senior SI/PI Packaging Lead for 2.5D ASICs position located in Dallas, TX, United States.
This role offers the option to work remotely.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior SI/PI Packaging Lead for 2.5D ASICs role in the description above.
We appreciate your interest in this position.
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