Design Verification Engineer; Semiconductor​/ASIC​/VLSI

We are seeking a Design Verification Engineer to ensure the functional correctness, performance, and reliability of complex semiconductor designs such as ASICs, SoCs, GPUs, or CPUs. The role focuses on developing robust verification environments and validating RTL designs prior to tape‑out.

• Develop and execute functional verification plans for ASIC/SoC designs
• Build System Verilog/UVM-based verification environments
• Write and maintain test benches, test cases, assertions, and coverage models
• Perform RTL debugging and work closely with design engineers to resolve issues
• Ensure verification completeness using functional and code coverage metrics
• Participate in design reviews, spec reviews, and tape‑out readiness
• Support regression testing and automation
• Contribute to continuous improvement of verification methodologies and flows

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Computer Engineering, or related field
• Strong understanding of digital design and computer architecture
• Hands‑on experience with UVM (Universal Verification Methodology)
• Experience with simulation and debugging tools (VCS, Questa, Xcelium)
• Knowledge of functional coverage, assertions, and constrained random testing

• ASIC Verification Engineer
• VLSI Verification Engineer
• SoC Verification Engineer
• Hardware Verification Engineer

Entry level

Full-time

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