FPGA/ASIC Hardware Engineer — Low-Latency Systems
Listed on 2026-10-17
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Engineering
Hardware Engineer
Hudson River Trading (HRT) is hiring for a hardware-focused role in New York. You will design and verify high-performance compute engines using FPGA/ASIC, implementing on-the-fly market data transformations and RTL models on a collaborative global team.
Prior internship in digital logic design is a plus. The team emphasizes rigorous design, verification, and learning, with a base salary around the stated figure and performance bonuses.
The FPGA/ASIC Hardware Engineer — Low-Latency Systems role at Hudson River Trading is now open for applications in New York, NY, United States.
This posting is for the FPGA/ASIC Hardware Engineer — Low-Latency Systems role at Hudson River Trading, based in New York, NY, United States.
We are looking to fill the FPGA/ASIC Hardware Engineer — Low-Latency Systems position at Hudson River Trading in New York, NY, United States.
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