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Photonic Layout Engineer

Job in Oakland, Alameda County, California, 94601, USA
Listing for: Acceler8 Talent
Full Time position
Listed on 2026-11-05
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 230000 USD Yearly USD 150000.00 230000.00 YEAR
Job Description & How to Apply Below

Senior Photonic Layout Engineer

Berkeley, CA

$150k–approximately $230k

* Open to PHD candidates - Senior.

We’re working with an early-stage photonic computing company developing an integrated optical-electronic platform for AI workloads. The approach uses light to address the power, data-movement and compute-density challenges of conventional electronic accelerators.

The work spans photonic compute, electronic ICs, packaging, memory and system architecture, with a focus on turning research silicon into a commercial computing platform.

They’re hiring a Senior Photonic Layout Engineer to own the photonic layout and tape-out flow, connecting PIC development with the electronic IC work already underway.

The role
  • Own the photonic layout flow from design implementation and routing through verification, sign-off and tape-out release.
  • Establish a Cadence Photonics workflow for Global Foundries’ 45 nm process, compatible with the electronic IC design flow.
  • Personally implement photonic and electronic layout and routing within Cadence, resolving interfaces between the two domains.
  • Own netlisting, DRC/LVS and foundry/PDK integration, ensuring designs meet manufacturing requirements.
Your experience
  • Direct PIC design experience, with substantial personal ownership of layout implementation, routing and verification.
  • Strong hands‑on Cadence experience, including practical work connecting photonic and electronic design flows.
  • Experience taking commercial photonic designs toward tape-out, with clear accountability for your own implementation and sign-off work.
  • Practical ownership of foundry PDKs, design rules, netlisting and DRC/LVS.
  • A strong understanding of silicon‑photonics device physics, supported by device or circuit design and simulation experience.
  • The ability to work across PIC, EIC, packaging and lab validation, understanding how layout decisions affect the integrated system.
  • Comfort with hands‑on execution, broad responsibility and establishing a design flow within a small team.
Why join?

You’ll own a foundational part of a photonic computing platform while major design and integration decisions are still open. The work connects photonic devices with electronic ICs, packaging and measured hardware performance.

You’ll work directly with a technically deep founding team and help build the workflow that turns individual designs into a complete, manufacturable system.

This is an opportunity for someone who wants to take responsibility for chip‑level implementation and help move photonic computing from research silicon toward a commercial product.

Featured benefits

Medical insurance, Vision insurance, Dental insurance, 401(k)

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