Thermal & Thermo-Mechanical Analysis Engineer - Contractor

We are seeking a staff-level Thermal & Thermo-Mechanical Analysis Engineer to lead the simulation, modeling, and architectural definition of our next-generation AI data center hardware. In this role, you will be responsible for the end-to-end thermal integrity of high-power AI systems. Your work will directly impact advanced CoWoS (Silicon Interposer) architectures, complex substrate packaging, and high-layer-count data center-class PCBs. The ideal candidate will possess deep expertise in semiconductor thermal management and will develop innovative cooling solutions spanning chip/package/PCB/system stack including traditional air cooling, cold plates, direct-to-chip liquid cooling, immersion cooling, microchannel cooling, advanced TIMs, and emerging thermal technologies required to support future AI compute platforms.

• Thermal Analysis & Modeli ng:
  Build high-fidelity static and dynamic thermal models for AI workloads spanning silicon, advanced packaging, and system levels.
• Thermo-Mechanical Simulation:
  Predict and mitigate structural risks including warpage, die-tilt, thermal stress, and solder joint reliability (BLR/BGA).
• Workload-Driven Characterization:
  Simulate transient thermal behavior under varying data center workloads, calculating time-dependent nodal temperatures, and plotting thermal contours.
• Mitigation Strategies:
  Develop, propose, and implement innovative cooling and mechanical mitigation techniques (e.g., TIM selection, stiffener rings, optimized copper balancing).
• System level solution:
  Perform thermal modeling and CFD analysis for die, package, board, and system designs. Develop cooling solutions for high-power AI/HPC devices (>1kW TDP).
• Cross-Functional Collaboration:
  
  Partner with Silicon Architecture, Package Design, and System Hardware teams to co-optimize the thermal-mechanical-electrical envelope. Engage with ODMs and cooling ecosystem partners.

• Experience:
  
  5+ years of industry experience in thermal and structural analysis of semiconductor packages and systems.
• Advanced Simulation Tool Mastery:
  Proficient in industry-standard thermal and thermo-mechanical tools, specifically Ansys Icepak and Cadence Celsius. Fluent, Star-CCM+, FLOEFD, Red Hawk-SC ET
• Advanced Packaging Expertise:
  Proven experience modeling high-density packaging architectures, specifically TSMC CoWoS-L (with Silicon Interposers).
• Substrate & PCB Knowledge:
  Deep understanding of complex package substrates and heavy data center-class PCBs.
• Data Center
  
  Experience:
  
  Hands-on experience analyzing high-power GPU workloads (700W–1000W+) under both static steady-state and dynamic transient states.
• Data Visualization:
  Ability to extract, analyze, and present complex simulation metrics, including multi-layer thermal contours and structural warpage profiles.

• Package Design Capabilities:
  Hands-on experience designing physical package layouts and substrate routing using Cadence APD (Allegro Package Designer) or Allegro X.
• Multi-Physics Integration:
  Familiarity with structural analysis tools like Ansys Mechanical for deep-dive finite element analysis (FEA).

The Opportunity

The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem:
how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package? That's what we solve. TYLsemi builds the chiplet infrastructure IP — the IO, power delivery, and interconnect building blocks — that makes AI/HPC systems actually work at scale.
This isn't a nice-to-have. It's the critical path.

• Moore's Law is dead. 2nm and beyond delivers…