Product Engineer - Tessent Design Test; DFT

Product Engineer - Tessent Design for Test (DFT)

Position Overview
The Tessent division seeks a highly motivated, creative, and energetic individual as Product Engineer, specializing in design-for-test (DFT) and test delivery at chip and system level. Tessent is the market and technology leader of automated tools for insertion of semiconductor design-for-test structures, automatic test pattern generation, embedded deterministic compression, memory built-in self-test, logic built-in self-test, diagnosis‑driven yield analysis, hierarchical DFT solutions such as Streaming Scan Network, and analog fault injection and test.

This position presents a great opportunity to stay involved technically while getting exposure to marketing and interacting with sales.

• Define and characterize new product capabilities needed to meet customer requirements.
• Work collaboratively with Tessent R&D to prototype, evaluate, and test new products and features within complex IC design flows.
• Lead beta programs and support beta partners.
• Drive product adoption and growth.
• Create and deliver in‑depth technical presentations; develop training material, white papers, contributed articles, and application notes.
• Develop and review tool documentation such as user and reference manuals.
• Work with customers and Siemens EDA stakeholders such as regional application engineers, global support engineers, and marketing.
• Work through complex technical issues and independently create solutions and new methodologies.
• Present complex principles in simple terms to broad audiences.
• Collaborate and share information across team boundaries in written and spoken forms.
• Some travel, domestic and international.

• BS degree (or equivalent) in Electrical Engineering, Computer Science, Computer Engineering, or related field.
• High energy, curious individual, self‑motivated to learn new DFT methodologies and technologies.
• Able to work as individual contributor.
• Strong problem‑solving, reasoning, and deduction skills; ability to analyze and debug complex design and simulation issues.
• Proficiency in LINUX and Windows environments.
• Proficiency in a scripting language like TCL (preferred) or Python.
• Excellent written and spoken English language communication skills.
• Excellent organizational skills.
• Work location:
  
  Wilsonville, OR.

• 1+ years of work experience, including DFT for complex ASICs/SOCs; experience in ATPG, internal scan, embedded scan compression, packetized test delivery, MBIST, LBIST, IEEE 1687 IJTAG, analog design and simulation, hierarchical DFT implementation.
• Experience working with DFT tools, preferably Tessent tool suite.
• Industry experience with inserting scan, running ATPG, and debugging fault coverage.
• Knowledge of IC design trends and emerging requirements.
• Exposure to one or more adjacent IC disciplines such as RTL coding and verification using Verilog/System Verilog/VHDL, synthesis and timing analysis, place and route, advanced IC packaging, DFT and test for embedded IP cores, failure diagnosis, ATE use / test program development.

Export Control
This position will be subject to U.S. export control requirements under the International Traffic in Arms Regulations (ITAR) and/or Export Administration Regulations (EAR). Employment is contingent on either verifying the U.S. Person status or obtaining any necessary export license.

Why Us?
Working at Siemens Software means flexibility – choosing between working at home and the office at other times is the norm here. We offer great benefits and rewards, as you'd expect from a world leader in industrial software.
A collection of over 377,000 minds building the future one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow!

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