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Senior Design Verification Engineer; remote

Remote / Online - Candidates ideally in
Dallas, Dallas County, Texas, 75215, USA
Listing for: Chelsea Search Group
Remote/Work from Home position
Listed on 2025-12-27
Job specializations:
  • Engineering
    Software Engineer, Systems Engineer, Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 150000 USD Yearly USD 90000.00 150000.00 YEAR
Job Description & How to Apply Below
Position: Senior Design Verification Engineer (remote)

Senior Design Verification Engineer
Remote / work from home
US Citizen or US Permanent Resident
Full-time/employee + Benefits + 401k + Stock Options

Responsibilities:
  • Develop and execute verification plans for digital designs using System Verilog and UVM
  • Create and maintain test benches, test cases, and test vectors
  • Contribute to the development of novel methodologies and verification techniques
  • Run simulations to verify design against specifications and analyze results, identify issues, and debug designs
  • Implement coverage tracking and metrics
  • Document plans, environments, test cases, and all results for a comprehensive record of all verification strategies
  • Your primary responsibilities will include developing test plans, writing test benches and tests, and debugging any bugs found with the RTL team.
  • Required Skills:
  • BSEE/MSEE with 5+ years of hands-on experience in SoC verification using UVM
  • Experience in gate level simulation setup and process corner failure analysis
  • Experience using Synopsys verification tools such as VCS, Verdi, and Spyglass
  • Experience with digital design concepts and ASIC development flow
  • Experience writing and debugging RTL using System Verilog
  • Programming experience using C, C++, and/or Python/Perl
  • Ability to work collaboratively across teams and communicate effectively
  • Ability to multi-task and prioritize in a fast-paced environment; managing multiple complex, multidisciplinary tasks and projects
  • Preferred

    Skills:
  • Experience verifying high-speed interfaces such as PCIe and DDR
  • Experience verifying RISC-V based systems
  • Experience with emulation or FPGA prototyping
  • Experience with formal verification methodologies
  • Experience with the Chisel hardware description language
  • Experience with version control systems (e.g., Git) and Continuous Integration/Continuous Deployment (CI/CD) pipelines
  • #SoC #UVM #System Verilog #SoCDesign #Design Verification

    #J-18808-Ljbffr
    Position Requirements
    10+ Years work experience
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