Remote Senior SerDes ASIC/SoC Design Engineer; PCIe/PHY
Job Description & How to Apply Below
Chipright is seeking a Senior RTL Design Engineer for a contract role focusing on Ser Des ASIC/SoC design. This position is fully remote within the UK and CET time zones.
The ideal candidate will have over 10 years of experience in ASIC/SoC RTL design, particularly with System Verilog/Verilog. Key responsibilities include implementing RTL, integrating Ser Des into ASIC environments, and supporting the verification process.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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