Signal Processing Architect
Leatherhead, Surrey County, KT22, England, UK
Listed on 2026-08-01
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Engineering
Systems Engineer
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Office
Location:
Leatherhead, GB, KT22 7SS
Company: NEC Corporation
RoleSummary:
NECTML's Radio Systems Division in Leatherhead, Surrey is recruiting a Signal Processing Architect (Consultant/Senior Consultant level) to define and architect key L1/L2 signal processing blocks across its in-house C++ Link-Level and System-Level simulators, virtualised Distributed Unit (vDU) L1/L2 software, and Radio Unit (RU) L1 hardware IP, supporting 5G /5G Advanced/6G development and 3
GPP RAN1/RAN2 standardisation activities. Candidates should bring expert-level digital signal processing, linear algebra/statistics and algorithm development experience (synchronisation, channel estimation, equalisation/MIMO detection, decoding), strong C++/OO programming, link/system-level simulation experience, familiarity with 3
GPP standards and AI/ML (particularly agentic AI) applied to development workflows, and MATLAB-based data analysis, and should be educated to PhD level or equivalent in communications, software engineering, physics or mathematics; experience with O-RAN, vDU/RU/FPGA development, Python, SIMD optimisation, NTN signal processing and multi-threading is desirable.
Position: Signal Processing Architect
Grade: Consultant/Senior Consultant, depending on skills and experience, Radio Systems Division
Location: NEC Telecom MODUS ltd, Leatherhead, Surrey, UK. Remote working possible.
Role Type: Permanent, Full Time
Company:NEC Corporation (“NEC”) has a worldwide network of subsidiary companies, which includes operations in Europe where NEC performs various sales, manufacturing, and R&D functions. NEC includes the Network Solutions Business Division (“NSBD”), based in Kawasaki, Japan which is responsible for the development of NEC’s mobile network infrastructure solutions.
NEC Telecom MODUS Limited (“NECTML”) provides R&D services to the NSBD to enable NEC to manufacture and deliver 5G Advanced and 6G mobile radio-communication base stations and associated switching and control systems based on international standards. Typically, almost half of the activities are development; one third applied research; one sixth standard setting and the rest other technical activities. The research and development functions include Link-Level and System-Level simulator development as well as hardware and software development.
The main activity areas of the Radio Systems Division of NECTML are the architecture, simulation, design and development of the baseband data processing aspects of the base station, as described in 3
GPP Specification Groups’ description of Radio Layers 1 and 2.
NTML has developed inhouse Link Level and System Level simulators using C++. The Link Level simulator accurately models the entire transmission/reception chain between a base station (BS) and User Equipment (UE), in some cases to bit-true level. The System Level simulator uses a higher level of abstraction to model a loaded network including UE mobility, detailed environment/channel models and antenna configurations.
This position involves defining and architecting key L1/L2 signal processing blocks across NECTML’s development activities: in the Link Level and System Level simulators, in the virtualised Distributed Unit (vDU) L1/L2 software, and in the Radio Unit (RU) L1 hardware IP. It also involves helping to develop and maintain the simulation tools which are essential for many of the activities carried out by NECTML, and more widely in NEC.
The role involves the identification (from the 3
GPP RAN1/RAN2 specifications), design and implementation of new features within the simulators (particularly relating to New Radio ()) and contributing to the various activities for which the simulation tools are used. For example:
- Investigation and analysis of new features in the 3
GPP specification from implementation in the simulator through to performance verification. - Development of physical layer receiver algorithms and verification of their performance.
- Architecting L1/L2 signal processing solutions for the virtualised DU software and the RU hardware IP, ensuring consistency between the simulation models and the…
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