Sr ASIC Design Engineer - TeraWave Job California Missouri USA,Engineering

Application close date:
Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!

Blue Origin is pioneering the future of space-based communications with Tera Wave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth.

We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! This is a foundational role within our Silicon Systems Development team. To further Blue Origin's mission of millions of people living and working in space for the benefit of Earth, we are bringing together technology from across our product lines to build the future of space-based communication.

This role will be onsite in either our Cupertino, CA, San Diego, CA or Austin, TX offices. It is approved for a temporary remote work exception while our local sites are being developed in San Diego, CA and Austin, TX.

Key Responsibilities

Design and develop FPGAs, digital ASICs, and/or mixed-signal ASICs
Implement designs using HDL (VHDL, Verilog, and/or System Verilog)
Develop verification methodologies and test benches for block and system-level verification
Create and execute test plans, develop test harnesses, and implement coverage models
Conduct timing analysis, noise analysis, and other signoff checks
Collaborate with cross-functional teams including systems, firmware, architecture, and product engineering
Support lab integration and troubleshooting activities
Resolve design issues and drive solutions for timing, congestion, and other implementation challenges

Basic Qualifications

7+ years of experience in ASIC design and implementation
Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical discipline
Experience with FPGA & ASIC design
Proficiency in HDL programming (VHDL, Verilog, and/or System Verilog)
Experience with Linux development environment
Experience with design verification and test bench development

Preferred Skills and Experience

Advanced degree (MS/PhD) in Electrical Engineering, Computer Engineering, or related field
Experience in full ASIC/FPGA lifecycle (architecture, design, simulation, verification, validation, integration & test)
Experience with Software-Defined Radio Architectures, ADC/DAC, and/or DSPs
Knowledge of DSP and communications systems including spread spectrum, forward error correction, and modulation types (QPSK, QAM, PCM/FM, PAM)
Strong object-oriented programming and scripting skills (Python, TCL, Perl)
Experience with physical design flows and industry-standard EDA tools
Experience with RTL2

GDSII physical design and signoff flows
Knowledge of deep sub-micron FinFET and CMOS technologies
Experience with DFT/Scan/MBIST/LBIST methodologies
Experience mentoring junior engineers

Base Pay Range for: CA applicants is $ - $ Other site ranges may differ.

Culture Statement

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