Remote FPGA Engineer – SystemVerilog & PCIe Gen

A leading tech consultancy is seeking a Mid-Senior level engineer with strong System Verilog RTL capabilities for a fully remote role from the UK. You will possess confidence across 100

Gb Ethernet, PCIe Gen5, and AXI while being comfortable taking designs through to timing closure.

Experience with Vivado and Vitis, and proficiency in Python or TCL to streamline work is essential. Join a culture that respects engineering excellence and offers genuine technical ownership.
Our organisation is growing, and we are hiring a Remote FPGA Engineer – System Verilog & PCIe Gen5 in England, United Kingdom. We are looking to fill the Remote FPGA Engineer – System Verilog & PCIe Gen5 position at Gazelle Global in England, United Kingdom. The Remote FPGA Engineer – System Verilog & PCIe Gen5 role at Gazelle Global is now open for applications in England, United Kingdom.