Senior Verification Lead - ASIC/FPGA; Remote
Tempe, Maricopa County, Arizona, 85280, USA
Listed on 2026-10-30
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Engineering
Test Engineer, Electronics Engineer, Hardware Engineer
Fidus Systems is seeking a Verification Designer to own block- and system-level verification for ASIC/FPGA designs, driving coverage closure and creating robust verification environments. You will lead CRV-based UVM/formal strategies and work directly with clients on verification approaches.
The role requires 8+ years in ASIC/FPGA verification, strong System Verilog/UVM fluency, and experience with functional coverage and assertions. Fully remote with travel to client sites as needed.
This role, Senior Verification Lead - ASIC/FPGA (Remote) at Fidus Systems, could be your next career step.
This role, Senior Verification Lead - ASIC/FPGA (Remote) at Fidus Systems, could be your next move.
Are you ready to take on the Senior Verification Lead - ASIC/FPGA (Remote) role at Fidus Systems?
We would love to welcome a new Senior Verification Lead - ASIC/FPGA (Remote) to our organisation in AZ, United States.
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