Senior ASIC Packaging SI/PI Lead; Remote
Oakland, Alameda County, California, 95199, USA
Listed on 2026-10-30
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Engineering
Packaging Engineer, Electronics Engineer, Systems Engineer
Cisco Systems, Inc. is seeking a Signal and Power Integrity Technical Lead in Silicon Valley to define, design, and verify high-performance ASIC packaging for Cisco platforms.
The role focuses on ultra-high-speed signaling, SI/PI analysis, and cross-functional collaboration across layout and system teams. You will mentor junior engineers, lead design reviews, and help drive best practices in 2.5D packaging technologies, including interposer-based designs.
For the Senior ASIC Packaging SI/PI Lead (Remote) position at Cisco Systems, Inc., we are reviewing applications now.
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We would love to welcome a new Senior ASIC Packaging SI/PI Lead (Remote) to our team in San Jose, CA, United States.
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