Remote DFT Architect AI Chiplet​/SOC

Tyl Semi, Inc. seeks an experienced DFT Architect to lead the Design-for-Test strategy for complex ASIC/SOC designs.

You will define end-to-end DFT architecture, including scan with compression, MBIST, boundary scan, SSN, and at-speed testing, partnering with RTL, PD, and verification. You will drive test coverage, silicon bring-up, yield analysis, and automation, mentor junior engineers, and deliver robust DFT solutions that scale with advanced nodes.

This is a great opening to take on the Remote DFT Architect for AI Chiplet/SOC role at TYLsemi.

The Remote DFT Architect for AI Chiplet/SOC role at TYLsemi is now open for applications in San Jose, CA, United States.

Join us at TYLsemi as our next Remote DFT Architect for AI Chiplet/SOC in San Jose, CA, United States.

We are currently recruiting a Remote DFT Architect for AI Chiplet/SOC for our team in San Jose, CA, United States.