Expert​/Senior Logic Design Engineer; Fully Remote

• Design and implement low-latency RTL modules in System Verilog.
• Develop FPGA/ASIC logic for signal processing and real-time control.
• Own RTL lifecycle from architecture to verification.

Requirements:

• BS/MS in EE/CE or equivalent, 4+ years FPGA/ASIC design.
• Strong System Verilog and microarchitecture skills.
• Experience with synthesis, STA, and CDC.

Nice to Have:

• Familiarity with AXI, PCIe, DDR interfaces.
• Python/Tcl scripting.

The company develops advanced control and measurement systems for quantum computing, enabling precise real-time control of complex quantum systems. It works in an international engineering environment focused on FPGA and ASIC-based platforms.

The Expert/Senior Logic Design Engineer (Fully Remote) role at Confidential Client is now open for applications in United States.

The Expert/Senior Logic Design Engineer (Fully Remote) position in the Engineering field is open for applications.

We have an opening for a Expert/Senior Logic Design Engineer (Fully Remote) in United States within Engineering.