Advanced ASIC FPGA Verification Engineer – Remote

Our DoD/Aerospace Client is looking to fill a Senior ASIC/FPGA Verification Engineer position supporting advanced ASIC and FPGA development and verification. This role focuses on digital design verification, simulation, testbench development, functional coverage, and the development of complex electronic systems.

The position is associated with the Scottsdale, AZ team and may be fully remote, on-site, or hybrid/flex, as mutually agreed.

Location:
Scottsdale, AZ / Remote or Hybrid/Flex options available
Position:
Senior ASIC/FPGA Verification Engineer
Contract Length: 12-24 months with possibility of going direct
Pay: $76.16/hour
Education/

Experience:

Bachelor’s degree plus 5+ years of job-related experience, or Master’s degree plus 3+ years of job-related experience

Schedule:

Flexible schedule; 9/80 schedule with every other Friday off may be available
Clearance Requirement:
No clearance required

As the Senior ASIC/FPGA Verification Engineer, you’ll be responsible for the definition, design, verification, and documentation of ASIC and FPGA developments. You will determine architecture, system simulation, and detailed design approaches; define module interfaces; develop test and simulation plans; verify results; analyze performance; and support projects throughout the ASIC/FPGA development life cycle.

You will work with ASIC/FPGA engineering concepts, design processes, simulation, and verification technologies while independently determining approaches to technical solutions. Responsibilities may also include reviewing vendor capabilities and simulation tools, improving organizational ASIC/FPGA processes, planning and executing project tasks, and providing technical direction to lower-level employees.

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related Science, Engineering, Technology, or Mathematics field, plus a minimum of 5 years of job-related experience, or a Master’s degree plus 3 years of job-related experience
• Proficiency in ASIC/FPGA engineering concepts, principles, theories, design techniques, and design processes
• Experience supporting the definition, design, verification, simulation, and documentation of ASIC and/or FPGA developments
• Ability to determine architecture, system simulation, and detailed design approaches
• Ability to define module interfaces and other aspects of device design and simulation
• Experience creating test and simulation plans, verifying test results, and analyzing performance
• Ability to independently determine approaches to technical solutions and execute project tasks
• Proficiency with Microsoft Office applications
• Strong written and verbal communication skills, including the ability to communicate technical issues, impacts, and corrective actions
• Ability to operate effectively in a team environment, learn new skills, think creatively, and manage multiple tasks
• U.S. citizenship is required

• In-depth experience with RTL simulation tools, including Siemens Mentor Graphics Questa, Model Sim, or equivalent, within a Linux environment
• In-depth knowledge of System Verilog object-oriented programming and Universal Verification Methodology (UVM)
• Experience with UVM testbench architectures, UVM agents, and bus functional models
• Experience with functional coverage, cover classes, cover points, assertions, predictive testbench components, and constrained-random testing
• Experience with the Register Abstraction Layer (RAL)
• Familiarity with requirements-based verification, requirements tracing, and verification strategy development
• Scripting experience with Linux shell scripting, TCL, and Python
• Familiarity with formal verification tools, code coverage, and waiver development
• Experience with Questa…