ASIC & FPGA Design Engineer Stf
Job in
Orlando, Orange County, Florida, 32885, USA
Listed on 2026-10-17
Listing for:
Anysilicon
Full Time
position Listed on 2026-10-17
Job specializations:
-
Engineering
Electronics Engineer, Electrical Engineering, Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
Job Description
Lockheed Martin is seeking an experienced ASIC & FPGA Design Engineer to join their Missiles and Fire Control department. This role involves designing custom analog and mixed-signal ICs for advanced defense systems, with a focus on layout flow from floorplan to tape out.
Responsibilities- Own the entire layout flow from floorplan through tape out.
- Collaborate with circuit designers to create high-performance, parasitic-aware physical designs.
- Create floor plans and optimize area, matching, signal integrity, and power delivery for analog blocks.
- Drive DRC, LVS, and ERC verification for full closure across multiple foundries.
- Perform EMIR analysis to address IR drop and electromigration issues.
- Develop and maintain layout methodology and automation scripts.
- Manage tape out sign-off packages, including documentation and design rule decks.
- Mentor junior layout engineers and foster a knowledge-sharing culture.
- Associate degree or higher in Electrical Engineering, Electronics Technology, Microelectronics, or a related field.
- 8+ years of experience in full-custom analog or mixed-signal IC layout design.
- Experience with process nodes from 130nm to 12nm, including BCD technologies.
- Proficiency in Synopsys Custom Compiler and Cadence Virtuoso layout environment.
- Experience with physical verification closure (DRC, LVS, ERC, ANT) across multiple foundry processes.
- Ability to obtain a U.S. security clearance.
- Bachelor's degree in Electrical Engineering or related field (preferred).
- Experience with EMIR analysis and mitigation techniques.
- Scripting or layout automation skills (SKILL, Tcl, Python, or Perl).
- Layout experience with precision analog blocks such as PLLs, ADC/DACs, LDOs, bandgap references, or amplifiers.
- ASIC Design Services
- Verification
- Packaging & Wafer
- Semiconductor IP
- ASIC Design Services
- Verification
- Packaging & Wafer
- Semiconductor IP
Work Email
Free No obligation Response within 24 hours
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