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Senior ASIC Verification Engineer

Job in Ottawa, Ontario, Canada
Listing for: HiringAgents.ai
Full Time position
Listed on 2026-02-28
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Software Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 CAD Yearly CAD 80000.00 100000.00 YEAR
Job Description & How to Apply Below

Location:

Ottawa, Ontario, Canada | Hybrid | Full-time | Compensation:
Competitive

Client:
Myticas Consulting

Job title:

Senior ASIC Verification Engineer

About

The Role

Myticas Consulting is seeking a highly experienced Senior ASIC Verification Engineer to support a leading semiconductor client in developing and verifying complex digital ASICs. In this hybrid role based in Ottawa, you will lead the creation of advanced verification infrastructure and UVM-based test benches, working in a collaborative, geographically distributed engineering team. You’ll be at the heart of coverage-driven verification flows, ensuring robust, high-quality silicon for cutting-edge products.

Responsibilities
  • Lead the development of verification infrastructure for advanced, complex digital ASIC designs
  • Create System Verilog/UVM-based protocol and traffic generators and checkers
  • Develop and execute verification test plans based on functional specifications and industry standards
  • Define, develop, and run self-checking tests for block- and sub-chip-level ASIC verification
  • Utilize assertions, functional coverage, code coverage, and formal verification techniques to ensure thorough verification closure
  • Collaborate effectively with a distributed team to review specifications, debug issues, and sign off on verification quality
Requirements
  • Must be based in or near Ottawa, Ontario, Canada, and able to work in a hybrid on-site arrangement
  • Minimum 8 years of professional experience in ASIC verification
  • At least 5 years of work and/or education experience in Canada in ASIC, digital design, or closely related hardware engineering roles
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field
  • Hands-on experience developing System Verilog/UVM-based verification environments and test plans for complex digital ASICs at the block or sub-chip level
  • Demonstrated use of assertions, functional coverage, and code coverage as part of ASIC verification flows
Preferred Skills
  • Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science
  • Proficiency with scripting languages such as Python to automate verification tasks and flows
  • Experience with formal verification tools in an ASIC verification environment
  • Knowledge of DSP and/or FEC technologies
  • Strong communication skills and proven ability to work effectively in a geographically distributed team
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Position Requirements
10+ Years work experience
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