Job Description & How to Apply Below
Ciena is seeking a Senior Analog Engineer to drive innovation in telecommunications. You'll design high-speed circuits in a collaborative, flexible environment.
As part of Ciena, you will be instrumental in developing advanced analog circuit designs for the Wavelogic family of products. Your proficiency in BiCMOS and CMOS technologies will shine as you work on ADC-based SERDES solutions and collaborate with layout teams to deliver quality GDSII designs. Strong problem-solving and communication skills are vital.
Key Responsibilities:
• Create high-frequency clock generation and distribution circuits
• Collaborate on GDSII delivery and integration
• Design and characterize various analog circuits
• Work alongside the Analog Macro Integration team
• Regularly update team with insights and progress
Requirements:
• 5+ years of Analog Circuit Design experience
• Relevant engineering degree required
• Expertise in advanced CMOS and BiCMOS technology
• Familiarity with Cadence and Synopsys tools
• Excellent written and oral communication skills
Shape the future of connectivity with Ciena, working on transformative analog designs in the telecommunications sector.
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Position Requirements
10+ Years
work experience
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