Ciena Digital Verification Engineer

Position: Ciena Digital Verification Engineer Role
Join Ciena as a Digital Verification Engineer specializing in Wavelogic technology. This position emphasizes strategy implementation and functional validation in a flexible work environment.

As a major player in high-speed connectivity, Ciena seeks a motivated Digital Verification Engineer to strengthen its verification team. In this role, you'll leverage your background in System Verilog and UVM to propose innovative verification strategies and ensure comprehensive validation of functional blocks. Collaborate closely with design and architecture teams to deliver high-quality telecommunications solutions.

Key Responsibilities:

• Read and interpret architectural specifications for functional blocks

• Ensure detailed validation through simulation and coverage

• Create test benches for architectural components and scenarios

• Oversee regression monitoring and debugging processes

• Report verification status updates and collaborate effectively

Requirements:

• Electrical or Computer Engineering degree at BEng/BSc or higher

• Proficiency with System Verilog, UVM, and coverage techniques

• Strongly motivated and independent professional

• Excellent written and oral communication skills

• Experience in digital verification strategies

Leverage your engineering skills to enhance Ciena’s innovative telecommunications products through effective verification processes.
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