FPGA Design Verification Engineer; Hardware Senior Principal Consultant

FPGA Design Verification Engineer (Hardware Senior Principal Consultant) – Ottawa

FPGA Design Verification Engineer (Hardware Senior Principal Consultant). ONSITE (OTTAWA)

THIS CONTRACT HAS A TBD START DATE AND GOES FOR 12 MONTHS LATER (GREAT CHANCE OF EXTENSION)

LOCATION:

ONSITE (THE CLIENT IS IN THE OTTAWA AREA)

LANGUAGE: ENGLISH

REFERENCES: 2

• Proven experience in FPGA design and RTL development.
• Expertise in /LTE/eCPRI/CPRI/PTP protocols and signal processing.
• Familiarity with JESD
  204B/C, Ethernet, PCIe, AXI, and high-speed SERDES.

Tools: Quartus, Vivado, MATLAB/Simulink, HDL Coder. Knowledge of UVM and verification methodologies. Strong understanding of 4G/5G Radio architecture and O-RAN ecosystem. Experience with Git/Git Hub and version control workflows.

• 7+ years of FPGA design experience in wireless or high-speed systems.
• Experience in high-volume wireless products and IP development.
• Contributions to standards bodies or technical forums (O-RAN, 3
  
  GPP).

The FPGA Design Verification Engineer professional will be expected to execute the following tasks during this contract, but not limited to:

• Develop FPGA IP architecture for 4G/5G Radio Units
• Contribute to system-level design aligned with 3
  
  GPP and O-RAN Alliance specifications.

• Implement complex RTL blocks (Verilog/System Verilog/VHDL) and integrate into larger systems.
• Optimize FPGA resource utilization and ensure timing closure.

• Define and execute verification plans using UVM and advanced techniques.
• Perform simulation and system-level FPGA validation.

• Work closely with Radio Unit development teams for seamless integration.
• Partner with software teams to ensure hardware-software interoperability.
• Mentor junior engineers and participate in technical reviews.