Principal Engineer in Memory Interface Technologies

Lead innovation at Synopsys as a Principal Engineer focusing on memory interface IP. Utilize deep expertise in verification, firmware, and system problem-solving to enhance cutting-edge technologies.

Join a collaborative environment where you’ll leverage 15+ years of experience in advanced interfaces including DDR and HBM.

Your role entails guiding verification efforts, optimizing embedded firmware, and streamlining workflows across teams. You'll bridge the gaps between pre-silicon and post-silicon activities to ensure efficient bring-up and debugging.

Key Responsibilities:

• Lead verification for DDR, LPDDR, and HBM memory solutions

• Develop firmware for PHY initialization and performance

• Enhance verification environments with UVM and System Verilog

• Collaborate with cross-functional teams for system integrity

• Mentor engineers and drive problem-solving strategies

Requirements:

• 15+ years in verification and firmware roles

• Expertise in DDR, LPDDR, or HBM protocols

• Proficiency in UVM verification and System Verilog

• Strong scripting skills in Python or similar languages

• Solid analytical and debugging capabilities

Shape future technologies with your verification and firmware expertise at Synopsys.
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