Senior Layout Design Engineer

Senior Layout Design Engineer – Analog and Mixed‑Signal CMOS Layout

Join Synopsys as a Senior Layout Design Engineer, specializing in analog and mixed‑signal CMOS circuit layouts. Contribute to creative high‑speed Ser Des interfaces in a team‑oriented environment.

In this senior role, you will leverage your 5+ years of experience in analog CMOS circuit design to enhance Synopsys’s semiconductor capabilities. Your focus on high‑performance layouts ensures compliance with foundry rules while addressing signal integrity challenges. Collaborate seamlessly with global engineering teams to optimize device performance and reliability through superior layout methodologies.

• Implement analog and mixed‑signal CMOS layouts for Ser Des
• Collaborate closely with circuit designers for layout development
• Execute floor planning and layout verification processes
• Address signal integrity and ESD challenges in designs
• Maintain documentation for layout best practices

• Advanced degree in Electrical or Computer Engineering
• 5+ years in CMOS layout design for complex circuits
• Deep knowledge of deep submicron layout effects
• Experience with EDA tools and layout validation
• Basic UNIX and scripting language familiarity a plus

Drive the next generation of silicon IP at Synopsys through exact and innovative layout design practices.

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