Memory DFT Senior Technical Manager

Explore the forefront of memory technology at TSMC Design Technology Canada Inc. as a Senior Technical Manager specialized in DFT and BIST. Play a vital role in advanced memory solutions.

Operating from Ottawa, this position is designed for experienced leaders with over 10 years in memory testing and self-test development.

Your role involves directing BIST architecture efforts while innovating memory technologies critical to AI and Machine Learning. Collaborative efforts span global initiatives to ensure first-time-right silicon deployment.

Key Responsibilities:

• Define Memory Built-In Self-Test architecture and strategies

• Design and develop custom BIST engines for emerging memories

• Oversee fault modeling and implement robust testing strategies

• Lead integration of DFT solutions for complex memory designs

• Engage with EDA tool vendors for innovative solutions

Requirements:

• Extensive experience (10+ years) in memory test development

• Strong background in defect modeling and debugging techniques

• Proficiency in EDA tools like Synopsys and Mentor/Siemens

• Advanced knowledge of ASIC and memory subsystem design

• Exceptional initiative for solving cutting-edge problems

Lead the way in innovative memory solutions and collaborations with TSMC, pushing the boundaries of technology in the semiconductor industry.
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