Technical Leader, Memory Interface at Synopsys

Join Synopsys as a Technical Leader specializing in memory interface IP. Bring 15+ years of verification and firmware expertise to drive innovative solutions in high-performance technologies.

You will play a key role in verifying advanced DDR, LPDDR, and HBM technologies while enhancing development processes. Your responsibilities include fostering collaboration across various engineering teams, troubleshooting intricate issues, and mentoring junior engineers. This role emphasizes the importance of aligning pre- and post-silicon activities to ensure peak performance and reliability.

Key Responsibilities:

• Spearhead memory interface verification and validation efforts

• Optimize initialization and performance through firmware

• Create advanced UVM-based verification environments

• Collaborate for system integrity and issue resolution

• Mentor engineers and contribute to workflow improvements

Requirements:

• Over 15 years in verification and development roles

• Expertise in memory interface technologies

• Proficient with UVM and System Verilog methodologies

• Strong debugging and analytical skills

• Collaborative mindset and proven cross-functional influence

Enhance your technical leadership skills while shaping the future of memory technologies at Synopsys.
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