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Senior Design Verification Engineer at NXP
Job Description & How to Apply Below
This role requires over 10 years of experience in IP and System on Chip development, collaborating with a creative R&D team. You'll drive the timely delivery of high-quality IP and ensure its verification through advanced methodologies such as UVM, shaping solutions for diverse markets like automotive and IoT.
Key Responsibilities:
• Architect networking IP for next-gen System on Chips
• Conduct UVM verification on hardware and SoC products
• Perform trade-off analysis for project decisions
• Collaborate to maintain project timelines
• Produce comprehensive documentation throughout projects
Requirements:
• 10+ years in IP and SoC product development
• Proficient in System Verilog and UVM Verification
• Solid scripting skills in Python, TCL, or Perl
• Experience with EDA tools for design verification
• Excellent problem-solving and communication abilities
Join NXP to impact embedded processing and networking technology.
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Position Requirements
10+ Years
work experience
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